Technical Field
The present disclosure relates to a display device, and more particularly, to a display device including link lines.
Discussion of the Related Art
With the advancement of information society, demand for display devices in various forms has increased. Recently, various flat panel display devices, such as a liquid crystal display device (LCD), a plasma display panel (PDP), and an organic light emitting diode display device (OLED), have been used.
A display panel of the display device includes a display region to display images, and a non-display region surrounding the display region.
The display region includes gate lines and data lines crossing each other to define pixel regions in a matrix form. Further, power lines to supply a power signal i.e., a power voltage to the pixel regions are formed in the display region.
In case of the LCD, each pixel region includes a switching thin film transistor (TFT), a storage capacitor, and a liquid crystal capacitor. In case of the OLED, each pixel region includes a switching thin film transistor (TFT), a driving TFT, a storage capacitor, and an organic light emitting diode.
Gate drivers and data drivers are connected to the non-display region. A printed circuit board (PCB) is connected to the data drivers.
The PCB supplies a power voltage, control signals and data signals to the data drivers, and the data drivers supply control signals through signal lines (e.g., LOG lines) formed in the non-display region.
Link lines are formed in the non-display region and function to transfer signals to signal lines in the display region.
In other words, the gate driver is connected to the gate lines through respective link lines in the non-display region, and the data driver is connected to the data lines through respective link lines in the non-display region. Further, the data driver is connected to the power lines in the display region through respective link lines.
Accordingly, the gate driver supplies gate signals to the gate lines, and the data driver supplies data signals to the data lines and supplies the power voltage to the power line.
FIG. 1 is a plan view illustrating link lines of a display device according to the related art, and FIG. 2 is a cross-sectional view taken along a line II-II of FIG. 1.
Referring to FIGS. 1 and 2, link lines LL connect a data driver 13 with respective signal lines in the display region, for example, respective data lines DL and power lines. Even though not shown in the drawings, link lines connect a gate driver with respective gate lines.
The data driver 13 is connected to a PCB 11 and is supplied with control signals and data signals from the PCB 11.
Each data driver 11 or gate driver is connected to many link lines LL, and a distance between neighboring link lines LL is much shorter than that between neighboring gate lines or data lines.
Accordingly, there increases possibility that a short-circuit between neighboring link lines LL happens, and product yield is thus reduced.
In other words, when neighboring link lines LL contact each other, interference in data signals applied to the data lines DL happens, and thus images can't be displayed normally.
Referring to FIG. 2, first to fifth link lines 26a to 26e are formed at the same layer. Among these, the neighboring first and second link lines 26a and 26b are in contact, and thus a short-circuit happens.
The contact between the first and second link lines 26a and 26b happens due to a light exposure defect or etching defect when forming the first to fifth link lines 26a to 26e. Even though an insulating layer 28 is formed on the first to fifth link lines 26a to 26e, the short-circuit between the first and second link lines 26a and 26b is not prevented by the insulating layer 28.
The short-circuit causes interference in data signals applied to the data lines DL connected to the first and second link lines 26a and 26b, and images are thus not displayed normally. Accordingly, product yield is thus reduced.
Further, since all link lines 26a to 26e have a single layered structure, a link line, for example, the fourth link line 26d to transfer a power voltage has a high resistance. This causes a drop of the power voltage applied to the display region, and display quality is degraded.